SOMEWHERE

Somewhere deep in my heart,


I can feel a burning hearth.



I do not know who to blame,

But I often feel the winds of pain.



Sometimes pain is hard to endure,

For how long will I fight it, I am not so sure.



All I can blame is a false expectation,

A ray of false hope, which created this situation.



I think and think, I think in vain.

All I feel are the winds of pain.



I often hear you knock on my door,

I often feel your heart is pure.



Pure or impure, now I do not know.

Whenever I open the door, you never show.



Was it you who hugged me tight?

Wasn’t it you whom I always saw with my sight?



Do I see you, or is it an illusion?

LOL  I know it is not you, then why this confusion?



I wait and wait, I wait in pain,

I see all my efforts in vain.



I often question why you left?

But then why do I ask, for you were never there, more so in the times of test.



I do not want to miss you anymore.

Yet I think only about you, why, I am not sure.



Once I did desire you.

Once you were one of those chosen few.



I now can see,

My desire never deserved me!



Now I can see,

I and you were never meant to become “WE”.

CV

Curriculum Vitae

Name : Ekansh Bhatnagar
Email ID : ekansh.bhatnagar@gmail.com
Cell Phone : 91-98867- 69165

CAREER OBJECTIVE
To excel as an engineer in the field of Hardware Digital Design by mastering the knowledge of VLSI.

GENERAL INTRODUCTION
Year of Completion of Bachelor's Degree : June 2007
Date of Joining the Industry : 14 July 2007
Number of months in Industry : 29 months
Current Employer : Samsung Electronics India Software Operations (SISO)

PROFESSIONAL EXPERIENCE
I was placed on-campus by the Samsung Electronics India Software Operations, Bangalore in the final year of my graduation. I joined Samsung Electronics on 14 th July, 2007 and I am working for this firm till date.

CAREER GROWTH
I joined Samsung electronics as a Software Engineer . I have received 2 consecutive pay hikes and a promotion to the rank of Senior Software Engineer in the past 2 years.

ROLE AND RESPONSIBILITIES
I work as a VLSI Front End Design Engineer. My work is centered on Research and Development spanning Digital Hardware Design and Synthesis.

PROJECTS

1) MIPI SLIMBUS SLAVE
The objective of the project was to design a Slave device compliant with an industry Standard Protocol , MIPI SLIMBUS. The development was done from scratch since no reference model was available. I was a part of a 5 member design team.
Responsibilities
(a) Complete ownership of two modules, the Physical Layer and the Interface Device was given to me. They had to be designed in Verilog-2001 and functionally verified. The blocks were critical to the functioning of the protocol and involved designing of some complex Finite State Machines.
(b) Development of a Verilog Based Testbench to check the basic functionality of the MIPI SLIMBUS Slave device, with all the modules intergrated into it.
(c) Synthesis of the design on a 90 nm library.

2) An SPI – I2C Interface
The SPI-I2C Interface was an important project due to 2 reasons:-
a)It involved an extensive study phase since Industry Specific Protocols were involved : I2C,SPI and AMBA APB/AHB.
b) Time was a major constraint since the RTL had to be delivered to the customer in a short span of time.
Responsibilities
I worked as a part of a 2 member Team. We had to remove the APB Interface from the SPI Core, and configure it with an I2C Interface and an SRAM Interface . In the original RTL Control and Data information was communicated by the APB Interface. In the new RTL , I2C was supposed to communicate the Control Information and SRAM Interface the Data. The RTL and the testbench were delivered on time and the quality of the work, including documentation was appreciated.

3) An Emulator for PHY (Physical Layer) of Standard ECMA - 368
The project involved designing of a digital block that could emulate the behaviour of the Analog Physical Layer of the standard ECMA – 368 , a UWB (Ultra Wide Band) wireless communication protocol.
Responsibilities
(a) I worked as a part of a 2 member team. I was handed over the complete ownership of a module that allowed communication of control information between the Physical Layer and Medium Access Control Layer in Parallel Mode. This involved the design of a complex controller.
(b) Modifications in the legacy code (the older version of the design) to make it compatible with the changes in the latest draft of the protocol.
(c) Synthesis of the design on a 90 nm library

TECHNICAL SKILL SET

Languages
I possess requisite knowledge of the following HDLs and Software Programing Languages :
1. HDLs – Verilog HDL and VHDL
2. Tool Control Language (Tcl), Tk
3. C/C++
4. Perl Script
5. Shell Script
6. MATLAB Programming

EDA Tools
Comfortable working on the following EDA Tools :
1. Design Compiler (Synopsys)
2. Simvision (Cadence)
3. NC Verilog (Cadence)
4. Spyglass (Atrenta)
5. ModelSim (Mentor Graphics)

Platforms
Windows/ Sun Solaris

ACHIEVEMENTS

Technical Paper
I have co-authored a Technical Paper titled “Reconfigurable Architecture for IP Peripherals” along with three other Engineers. The paper is the outcome of our work on an IP that implements various audio and serial protocols that are widely used in the industry, on a single IP. The paper presents a novel reconfigurable architecture concept to integrate multiple protocols on a single reconfigurable IP. This concept is applied to implement multiple serial and audio interface applications on a single IP.

In the paper we have also proposed a methodology to integrate similar audio and serial interfaces onto a single reusable architecture. The architecture features multiple configurable blocks which are reconfigured and re-arranged to perform as any one of the serial or audio peripherals.The proposed architecture is AMBA compliant and special attention has been given to ensure an ease of SoC integration.

The paper has been awarded the “Award of Merit” at Global Samsung Best Paper Award (GSBPA) 2009 ,at the Global Samsung Tech. Conference 2009 , conducted by Samsung Advanced Institute of Technology (SAIT) from Nov. 18 ~ 20 , 2009 at Giheung, South Korea.We have been awarded by the Samsung Electronics India Software Operations for the same.I travelled with a co-author to present our paper and receive the award at SAIT, South Korea

EXTRA-CURRICULAR ACTIVITIES AND SOCIAL RESPONSIBILITY
1. Been involved in organization of team activities like game tournaments, team outings ,farewell parties etc.
2. Member of the Editorial Board of the in house newsletter (circulated in the division for which I work). I was the members of the core committee that took the initiative to bring a newsletter.
3. Member of the Editorial Board of the SEISMO Newsletter - The Newsletter of Samsung Electronics India Software Operations (SISO).
4. Member of the Literary Society of SISO, called SEISMO. Organized Literary events like Quiz and Debate.
5. Helped in co-ordination of different activities involved in the shifting of the office premises, when our division was shifted to a new building.

I am associated with the Oxfam Trust in India. It is a part of the Oxfam International, an organisation that aims to find lasting solutions to poverty and injustice through awareness campaigns, development programmes and emergency response.

ACADEMIC CHRONOLOGY
Completed BE in Electronics and Communications Engineering from Thapar University, Patiala in June 2007 with a CGPA of 8.85 on the scale of 10.

Year--Degree--Institute--City--CGPA/Marks

2007--Bachelor of Engineering--Thapar University--Patiala--8.85 on a scale of 10
2002--Class XII--Khalsa College--Amritsar--77.00%
2000--Class X DAV--PublicSchool--Amritsar--92.2%

List of Projects.

Short Term Projects
1) PCB Fabrication and Radio Circuit Assembly and Tuning

6 week Summer Training , (June - July 2005)
--1) Developed a working model of a “Superheterodyne Radio Receiver”
--2) Fabrication of a PCB (Printed Circuit Board) using laboratory methods
--3) Worked on circuit design and simulation softwares (ORCAD and Pspice)
2) Design of a Robotic Arm as a part of a project for the academic course , Power Electronics. It involved an extensive application of principles of Mechanics and Electrical Motors .

Industrial Internship
HDL BASED DESIGN CONCEPTS AND FLOW

6 month Industrial Internship, Dec 2005 to June 2006 , ST Microelectronics
My work involved front end digital design, simulation and synthesis. I worked with VDHL, Tool Control Language ,Shell Scripts and EDA tools like Simvision and Design Compiler

Extra – curricular Activities
1. I was a part of the Literary Society of my college. This society promotes literary activities in the college and organizes the annual literary festival , ACUMEN. I actively participated and promoted Debates. I was promoted to the rank of the General Secretary of the Literary Society in the final year of my college. This is the highest post held by a student member of the society.
2. I was also the member of the editorial team of the annual college magazine, Avant Garde. In the final year, I was promoted to the rank of Editor in Chief (along with one of my colleagues) of Avant Garde.
3. I was one of the Convenors of the Stage Management Committee of Music and Dramatics Society .
4. I was an Executive Member of the Thapar Chapter of ISTE (Indian Society for Technical Education).

PERSONAL DETAILS
Name : Ekansh Bhatnagar
Date Of Birth : 30 December 1983
Permanent Address : House No. E-9,
Customs Colony,
Lawrence Road,
Amritsar – 143001.
Phone Number : +91-98867-69165
Email ID : ekansh.bhatnagar@gmail.com